thin gate oxide

[θɪn ɡeɪt ˈɒksaɪd]
  • 释义

    薄栅氧化层

数据更新时间:2026-04-19 14:40:23
1、

Because at that time the gate oxide thickness is already very thin ( 20 A), the tunnel leakage current through mechanism has play a leading role.

因为这时候栅氧化层的厚度已经很薄(20A),栅极漏电流中的隧道穿透机制已经起到主导作用。

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2、

The breakdown characteristics of N thin gate oxide are investigated.

研究了含N超薄栅氧化层的击穿特性.

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3、

Study on high electric field annealing effect in thin gate oxide of MOS structure

MOS结构中薄栅氧化层高场退火效应的研究

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4、

Fabrication of Thin Gate Oxide High-Voltage CMOS

薄栅氧高压CMOS器件研制

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5、

High electric field annealing effect in thin gate oxide of MOS structure is studied in depth, and the detrapping mechanisms of trapped charge in the gate oxide are investigated.

深入研究了MOS结构中薄栅氧化层在高电场下的退火效应,对氧化层陷阱电荷的退陷阱机理进行了深入探讨。

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6、

Experimental Research on Breakdown Characteristics of Thin Gate Oxide

薄栅氧化层击穿特性的实验研究

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7、

The thin gate oxide is grown by nitric oxidation, while two step process of dry oxidation and low-pressure chemical vapor deposition ( LPCVD) is used for the thick gate oxide.

当干燥氧化物和降低化学蒸汽的压力使之凝固的2个步骤(LPCVD)被用于厚栅氧化物时,薄栅氧化物被氮氧化改善。

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8、

The dual gate oxide ( DGO) technology has been widely used in high-voltage CMOS process, it can integrate both thick gate oxide device and thin gate oxide device in a same chip.

双栅氧工艺(dual gate oxide)在高压CMOS流程中得到了广泛的应用,此项工艺可以把薄栅氧器件和厚栅氧器件集成在同一个芯片上。

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9、

Experimental analysis and physical model investigation of TDDB of thin gate oxide

薄栅氧化层经时击穿的实验分析及物理模型研究

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10、

The capacitively coupled plasma ( CCP) source is an important tool for etching profile of thin gate oxide with high fidelity due to an independent control of ion flux and energy.

甚高频容性耦合等离子体(CCP)是一种主要的刻蚀工具。由于其能分别控制离子通量和离子能量,通常用于高精度的薄栅极氧化层的刻蚀上。

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11、

A new voltage level shifter circuit with thin gate oxide, low power consumption and self-returning ability is designed.

设计了一个新型的薄栅氧、低功耗、自恢复的电平移位栅电压控制电路。

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12、

Breakdown Characteristics of Nitride Ultra-Thin Gate Oxide

含N超薄栅氧化层的击穿特性

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13、

Soft Breakdown Mechanism and Modeling in Ultra Thin Gate Oxide

超薄栅氧化层中的软击穿的击穿机理和击穿模型

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14、

The degradation and breakdown of thin gate oxide film are related with the generation of traps in oxide layer.

薄栅氧化层的退化、击穿与氧化层中和界面陷阱的产生相关。

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15、

SUPER-THIN LAYER ELECTROFOCUSING Research on TDDB of thin gate oxide

超薄平板等电聚焦电泳薄栅氧化层的TDDB研究

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16、

Research on TDDB of thin gate oxide

薄栅氧化层的TDDB研究

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17、

It is revealed that F N stress induced thin gate oxide breakdown is not simply determined by the total number of the injected holes.

这些新的实验结果表明F-N应力导致的薄栅氧化层的击穿不仅由注入的空穴数量决定。

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18、

A transistor with a thin gate oxide being driven by too high of a voltage.

一个用薄栅氧化层电晶体被太多的驱动电压高。

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19、

This paper analyzes impact ionization models of super thin gate oxide breakdown, and gives a detailed description of hole breakdown theories. It lays the foundation for the deep study of super thin gate oxide breakdown theories and for the modeling of super thin gate oxide breakdown.

分析了超薄栅氧化层击穿的碰撞电离模型,并对空穴击穿机理进行了详细描述,为超薄栅氧化层的击穿机理的深入研究及超薄栅氧化层击穿模型的建立奠定了基础。

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20、

The thin gate oxide high voltage CMOS ( HVCMOS) compatible with the 0 5 μ m standard CMOS process is fabricated.

研制了与0.5μm标准CMOS工艺完全兼容的薄栅氧高压CMOS器件。

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21、

A novel dual gate oxide ( DGO) process is proposed to improve the performance of high voltage CMOS ( HVCMOS) devices and the compatibility between thick gate oxide devices and thin gate oxide devices.

提出了一种新的双栅氧(dual gate oxide,DGO)工艺,有效提高了薄栅氧器件与厚栅氧器件的工艺兼容性,同时提高了高低压器件性能的稳定性。

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22、

The surfaces of poly-Si thin film and gate oxide of thin film transistors were passivated using N 2O/ NH 3 plasma. Radiation Characteristics of N_2O-Annealed H_2-O_2 Grown Oxide

采用N2O和NH3等离子钝化技术对多晶硅薄膜表面和栅氧表面进行了钝化处理。氮化H2-O2合成薄栅氧抗辐照特性

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23、

Study on parameter characterization of thin gate oxide TDDB breakdown

薄栅氧化层经时击穿的参数表征研究

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24、

FN tunneling and hot hole ( HH) stress induced leakage current ( SILC) transient characteristics in thin gate oxide are investigated.

分别研究了FN隧穿应力和热空穴(HH)应力导致的薄栅氧化层漏电流瞬态特性。

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25、

Modeling of DT ( direct tunneling) current in ultra-thin gate oxide n MOSFET's is researched.

研究了超薄栅氧MOS器件的直接隧穿(direct tunneling,DT)电流模型问题。

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26、

But when IC technology go to 90 nm node, the most thin thickness of gate oxide met with the challenges.

当集成电路技术进入90纳米时代以来,传统单纯降低栅氧化层厚度的方法遇到了前所未有的挑战。

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